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A Prospective Low-k Insulator for Via-Last through-Silicon-Vias (TSVs) in 3D Integration

Thanh Tung Bui and Xiaojin Cheng and Naoya Watanabe and Fumiki Kato and Katsuya Kikuchi and Masahiro Aoyagi (2016) A Prospective Low-k Insulator for Via-Last through-Silicon-Vias (TSVs) in 3D Integration. In: 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 2016.

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Official URL: http://doi.org/10.1109/ECTC.2016.344


Item Type:Conference or Workshop Item (Poster)
Subjects:Electronics and Communications
Divisions:Faculty of Electronics and Telecommunications (FET)
ID Code:2326
Deposited By: Bùi Thanh Tùng
Deposited On:28 Dec 2016 14:40
Last Modified:28 Dec 2016 14:40

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