VNU-UET Repository: No conditions. Results ordered -Date Deposited. 2024-03-28T14:41:43ZEPrintshttp://eprints.uet.vnu.edu.vn/images/sitelogo.pnghttps://eprints.uet.vnu.edu.vn/eprints/2021-11-27T02:33:03Z2021-11-27T02:33:03Zhttp://eprints.uet.vnu.edu.vn/eprints/id/eprint/4654This item is in the repository with the URL: http://eprints.uet.vnu.edu.vn/eprints/id/eprint/46542021-11-27T02:33:03ZMigSpike: A Migration Based Algorithms and Architecture for Scalable Robust Neuromorphic SystemsWhile conventional hardware neuromorphic systems usually consist of multiple clusters of neurons that communicate via an interconnect infrastructure, scaling up them confronts the reliability issue when faults in the neuron circuits and synaptic weight memories can cause faulty outputs. This work presents a method named MigSpike that allows placing spare neurons for repairing with the support of enhanced migrating methods and the built-in hardware architecture for migrating neurons between nodes (clusters of neurons). MigSpike architecture supports migrating the unmapped neurons from their nodes to suitable ones within the system by
creating chains of migrations. Furthermore, a max-flow min-cut adaptation and a genetic algorithm approach are presented to solve the aforementioned problem. The evaluation results show that the proposed methods support recovery up to 100% of spare neurons. While the max-flow min-cut adaption can execute milliseconds, the genetic algorithm can help reduce the migration cost with a graceful degradation on communication cost. With a system of 256 neurons per node and a 20% fault rate, our approach minimizes the migration cost from remapping by 10.19× and 96.13× under Networks-on-Chip of 4×4 (smallest) and 16×16×16 (largest), respectively. The Mean-Time-to-Failure evaluation also shows an approximate 10× of lifetime expectancy by having a 20% spare rate.Nam Khanh Dangdnk0904@gmail.comNguyen Anh Vu DoanAbderazek Ben Abdallahbenab@u-aizu.ac.jp2021-10-31T00:42:32Z2021-10-31T00:42:32Zhttp://eprints.uet.vnu.edu.vn/eprints/id/eprint/4618This item is in the repository with the URL: http://eprints.uet.vnu.edu.vn/eprints/id/eprint/46182021-10-31T00:42:32ZEnergy-efficient Spike-based Scalable Architecture for Next-generation Cognitive AI Computing SystemsOgbodo Mark IkechukwuNam Khanh Dangdnk0904@gmail.comAbderazek Ben Abdallahbenab@u-aizu.ac.jp2021-06-18T10:35:26Z2021-06-18T10:35:26Zhttp://eprints.uet.vnu.edu.vn/eprints/id/eprint/4459This item is in the repository with the URL: http://eprints.uet.vnu.edu.vn/eprints/id/eprint/44592021-06-18T10:35:26ZTowards Robust Cognitive 3D Brain-inspired Cross-paradigm SystemSpiking Neuromorphic systems have been introduced as promising platforms for energy-efficient spiking neural network (SNNs) execution. SNNs incorporate neuronal and synaptic states in addition to the variant time scale into their computational model. Since each neuron in these networks is connected to many others, high bandwidth is required. Moreover, since the spike times are used to encode information in SNN, a precise communication latency is also needed, although SNN is tolerant to the spike delay variation in some limits when it is seen as a whole.
The two-dimensional packet-switched network-on-chip was proposed as a solution to provide a scalable interconnect fabric in large-scale spike-based neural networks. The 3D-ICs have also attracted a lot of attention as a potential solution to resolve the interconnect bottleneck. Combining these two emerging technologies provides a new horizon for IC design to satisfy the high requirements of low power and small footprint in emerging AI applications. Moreover, although fault-tolerance is a natural feature of biological systems, integrating many computation and memory units into neuromorphic chips confronts the reliability issue, where a defective part can affect the overall system's performance. This paper presents R-NASH - a reliable three-dimensional digital neuromorphic system geared explicitly toward the 3D-ICs biological brain's three-dimensional structure, where information in the network is represented by sparse patterns of spike timing and learning is based on the local spike-timing-dependent plasticity rule. Our platform enables high integration density and small spike delay of spiking networks and features a scalable design. R-NASH is a design based on the Through-Silicon-Via technology, facilitating spiking neural network implementation on clustered neurons based on Network-on-Chip. We provide a memory interface with the host CPU, allowing for online training and inference of spiking neural networks. Moreover, R-NASH supports fault recovery with graceful performance degradation.Abderazek Ben Abdallahbenab@u-aizu.ac.jpNam Khanh Dangdnk0904@gmail.com2021-05-31T10:54:29Z2021-05-31T10:54:29Zhttp://eprints.uet.vnu.edu.vn/eprints/id/eprint/4431This item is in the repository with the URL: http://eprints.uet.vnu.edu.vn/eprints/id/eprint/44312021-05-31T10:54:29ZOn the Design of a Fault-tolerant Scalable Three Dimensional NoC-based Digital Neuromorphic System with On-chip LearningMark OgbodoNam Khanh Dangdnk0904@gmail.comAbderazek Ben Abdallahbenab@u-aizu.ac.jp2021-05-31T10:52:11Z2021-05-31T10:52:11Zhttp://eprints.uet.vnu.edu.vn/eprints/id/eprint/4430This item is in the repository with the URL: http://eprints.uet.vnu.edu.vn/eprints/id/eprint/44302021-05-31T10:52:11ZHotCluster: A thermal-aware defect recovery
method for Through-Silicon-Vias Towards Reliable
3-D ICs systemsThrough Silicon Via (TSV) is considered as the
near-future solution to realize low-power and high-performance
3D-Integrated Circuits (3D-ICs) and 3D-Network-on-Chips (3DNoCs). However, the lifetime reliability issue of TSV due to
its fault sensitivity and the high operating temperature of
3D-ICs, which also accelerates the fault-rate, is one of the
most critical challenges. Meanwhile, most current works focus
on detecting and correcting TSV defects after manufacturing
without considering high-temperature nodes’ impact on lifetime
reliability. Besides, the recovery for defective clusters is also
challenging because of costly redundancies. In this work, we
present HotCluster: a hotspot-aware self-correction platform for
clustering defects in 3D-NoCs to help understand and tackle
this problem. We first give a method to predict normalized fault
rates and place redundant TSV groups according to each region’s
fault rate. In our particular medium fault-rate (normalized to the
coolest area), HotCluster reduces about 60% of the redundancies
in comparison to the uniformly distributed redundancies while
having a higher ratio of router working in a normal state. Furthermore, HotCluster integrates both online (weight-based) and
offline (max-flow min-cut offline method) mapping algorithms to
help the system correct the faulty TSV clusters. The experimental
results show that both the max-flow min-cut offline method and
weight-based online mode with a redundancy of 0.25 exhibits less
than 1% of routers disabled under 50% defect-rates.Nam Khanh Dangdnk0904@gmail.comAkram Ben AhmedAbderazek Ben Abdallahbenab@u-aizu.ac.jpXuan Tu Trantutx@vnu.edu.vn2020-10-29T07:03:43Z2020-10-29T07:03:43Zhttp://eprints.uet.vnu.edu.vn/eprints/id/eprint/4082This item is in the repository with the URL: http://eprints.uet.vnu.edu.vn/eprints/id/eprint/40822020-10-29T07:03:43ZLow Cost Inter-prediction Architecture in H.264/AVC Encoders with an Efficient Data Reuse StrategyAdvances in Engineering Research. Volume 40 first presents the characteristics of the laser-plasma extreme ultraviolet radiation from solid rare gas targets composed of Xe, Kr and Ar, along with the performances of the radiation sources developed using these targets.
Following this, the authors consider the most important issues related to creating a universal system of adaptive applications for use in the Internet of Things and Internet of People systems.
Previous techniques and recent advances in circuit techniques are reviewed, and a comparison of the reported techniques in the context of low-pass continuous-time Delta-Sigma modulators is presented.
A comprehensive overview of the properties of aggregates used on roads is provided, particularly focusing on their influence on the mechanical and skid resistance of road surfaces.
An analytical approach that allows for a rough prediction of the of the acoustic parameters of road surface is also presented. The attenuation depends on frequency, propagation distance, angle of incidence and geometric configuration of sources and sensors.
Due to computation complexity, the VLSI implementation of Inter-Prediction in the H.264/Advanced Video Coding imposes latency, memory bandwidth, and area cost challenges. To tackle these obstacles, the authors discuss a design methodology which exploits the relationship between the main processes in inter-prediction to enhance the performance while keeping an affordable design cost.
The penultimate study focuses on the way we can interpret linguistic algebra to understand and reverse translation formulas’ linguistic algebra into natural language text as a verbal expression of meaning. This will improve the performance of any computer system when working with text.
Recent computational tools of vector fields, including vector data representations, predictive models of spatial data, as well as applications in computer vision, signal processing and empirical sciences are reviewed in closing.Xuan Tu Trantutx@vnu.edu.vnNam Khanh Dangkhanh.n.dang@vnu.edu.vnDuy Hieu Buihieubd@vnu.edu.vnAlain Merigot