Tran, Xuan Tu and Thonnart, Yvain and Durupt, Jean and Beroulle, Vincent and Robach, Chantal (2008) A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application. In: Proceedings of the 2nd ACM/IEEE International Symposium on Networks-on-Chips (NOCS 2008).
Full text not available from this repository.
Official URL: http://async.org.uk/nocs2008/
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Additional Information: | <span class='textit'>Oral presentation</span> |
| Subjects: | ?? AC ?? Electronics and Communications ?? Electronics ?? Electronics and Communications > Electronics and Computer Engineering |
| Divisions: | Faculty of Electronics and Telecommunications (FET) Key Laboratory for Smart Integrated Systems (SISLAB) |
| Depositing User: | Mr Duy-Hieu Bui |
| Date Deposited: | 29 Jan 2010 09:48 |
| Last Modified: | 17 Jan 2017 02:40 |
| URI: | http://eprints.uet.vnu.edu.vn/eprints/id/eprint/13 |
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