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High Gain High Efficiency Doherty Amplifiers with Optimized Driver Stages

Nguyen, Duy P. and Tran, Xuan Tu and Nguyen, Nguyen L. K. and Nguyen, Tan Phat and Pham, Anh Vu (2019) High Gain High Efficiency Doherty Amplifiers with Optimized Driver Stages. In: 2019 62nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 4-7 August 2019, Dallas, Texas, USA.

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In this paper, we present two different approaches to design a driver for high gain Doherty power amplifiers (DPAs): single driver and dual-driver topologies. Detailed analysis and quantitative comparison between the two approaches are proposed. In particular, the single driver topology is preferred when the output Doherty stage has a reasonable gain. On the other hand, when the output stage has low gain, the dual driver approach is required to prevent significant efficiency reduction. Two DPA circuits at two different frequency ranges have been fabricated in a 0.15-μm Gallium Arsenide (GaAs) process to verify the concept. The single driver DPA at 10 GHz achieves at a measured gain of 19.2 dB and the maximum power of 27 dBm. The peak power added efficiency (PAE) and PAE at 6-dB power back-off (PBO) are 43% and 32%, respectively. On the other hand, the dual driver DPA at 28 GHz exhibits 15 dB of gain, 28.2 dBm output power with an associated peak PAE of 37%. To the best of the authors’ knowledge, our DPA prototypes achieve the highest gain of all reported DPAs at similar frequency ranges.

Item Type: Conference or Workshop Item (Paper)
Subjects: Electronics and Communications
Electronics and Communications > Electronics and Computer Engineering
Divisions: Faculty of Electronics and Telecommunications (FET)
Key Laboratory for Smart Integrated Systems (SISLAB)
Depositing User: Prof. Xuan-Tu Tran
Date Deposited: 19 Jun 2019 07:55
Last Modified: 19 Jun 2019 07:55

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