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Analysis and Evaluation of Traffic-Performance in a Backtracked Routing Network-on-Chip

Pham, Thi Hong and Pham, Phi Hung and Tran, Xuan Tu and Kim, Chulwoo (2008) Analysis and Evaluation of Traffic-Performance in a Backtracked Routing Network-on-Chip. In: The 2nd International Conference on Communications and Electronics (ICCE 2008), 4-6 June 2008, Hoian, Vietnam.

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VLSI designers recently have adopted micro network-on-chip (or NoC) as an emerged solution to design complex SoC system under stringent constraints pertaining cost, size, power consumption, and short time-to-market. Characterization of on-chip traffics and traffic-performance evaluation are necessary steps bringing comprehensive and effective NoC design. This paper presents an analysis and performance evaluation framework of backtracked routing Network-on-Chip that provides guaranteed and energy-efficient data transfer. Experimental results, under common and application-oriented synthetic traffics, figure out the performance in terms of latency and throughput and suggest a tradeoff to developers to map applications into a proposed NoC platform.

Item Type: Conference or Workshop Item (Paper)
Subjects: Electronics and Communications
?? Electronics ??
Electronics and Communications > Electronics and Computer Engineering
Divisions: Faculty of Electronics and Telecommunications (FET)
Key Laboratory for Smart Integrated Systems (SISLAB)
Depositing User: Prof. Xuan-Tu Tran
Date Deposited: 05 Nov 2012 04:00
Last Modified: 17 Jan 2017 02:40

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