TY  - JOUR
ID  - SisLab132
UR  - https://eprints.uet.vnu.edu.vn/eprints/id/eprint/132/
IS  - 2
A1  - Pham, Phi-Hung
A1  - Park, Jongsun
A1  - Mau, Phuong
A1  - Kim, Chulwoo
Y1  - 2012/02/01/
JF  - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
VL  - 20
TI  - Design and Implementation of Backtracking Wave-pipeline Switch to Support Guaranteed Throughput in Network-on-Chip
SP  - 270
AV  - none
EP  - 283
ER  -