eprintid: 2457
rev_number: 7
eprint_status: archive
userid: 4
dir: disk0/00/00/24/57
datestamp: 2017-04-12 01:56:14
lastmod: 2017-04-12 01:56:14
status_changed: 2017-04-12 01:56:14
type: conference_item
metadata_visibility: show
creators_name: Phan, Hai Phong
creators_name: Tran, Xuan Tu
creators_name: Yoneda, Tomohiro
creators_id: haiphongphan@gmail.com
creators_id: tutx@vnu.edu.vn
creators_id: yoneda@nii.ac.jp
title: Power Consumption Estimation using VNOC2.0 Simulator for a Fuzzy-Logic based Low Power Network-on-Chip
ispublished: pub
subjects: ECE
subjects: ElectronicsandComputerEngineering
divisions: fac_fet
divisions: lab_sis
abstract: Dynamic Voltage and Frequency Scaling (DVFS) has been known as an efficient technique to reduce the power consumption of a Network-on-Chip (NoC). An important question in DVFS is how to change the voltage and frequency adaptable to the required performance of the system at run-time while reducing the power consumption as much as possible. Another
problem is how a tool could quickly and efficiently validate
or reject a NoC architecture employing DVFS. By integrating
the Orion 2 power model, VNOC 2.0 simulator can be used as
either a NoC simulation tool or a platform for implementing and investigating DVFS ideas. In this paper, we focus on developing a new solution for NoC architectures to save energy using fuzzy-logic algorithms. A controller is designed to predict the change of traffic load based on the fuzzy logic algorithm, then adjusts the voltage and frequency correspondingly to minimize the power consumption while keeping the performance of the whole system. An estimation of power consumption has been done by using
VNOC 2.0 simulator. The simulation results show that our model can save up to 46% the power consumption of a 8x8 NoC.
date: 2017-05-23
date_type: published
full_text_status: none
pres_type: paper
event_title: The 2017 IEEE International Conference on Integrated Circuit Design and Technology (IEEE ICICDT)
event_location: Texas, USA
event_dates: 23-25 May 2017
event_type: conference
refereed: TRUE
citation:   Phan, Hai Phong and Tran, Xuan Tu and Yoneda, Tomohiro  (2017) Power Consumption Estimation using VNOC2.0 Simulator for a Fuzzy-Logic based Low Power Network-on-Chip.  In: The 2017 IEEE International Conference on Integrated Circuit Design and Technology (IEEE ICICDT), 23-25 May 2017, Texas, USA.