%0 Journal Article
%@ 1063-8210
%A Bui, Duy Hieu
%A Puschini, Diego
%A Bacles-Min, Simone
%A Beigne, Edith
%A Tran, Xuan Tu
%D 2017
%F SisLab:2490
%I IEEE
%J IEEE Transactions on Very Large Scale Integration (VLSI) Systems
%N 12
%P 3281-3290
%T AES datapath optimization strategies for low-power low-energy multi-security-level Internet-of-Thing applications
%U https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2490/
%V 25
%X Connected devices are getting attention because of the lack of security mechanisms in current Internet-of-Thing (IoT) products. The security can be enhanced by using standardized and proven-secure block ciphers as Advanced Encryption Standard (AES) for data encryption and authentication. However, these security functions take a large amount of processing power and power/energy consumption. In this paper, we present our hardware optimization strategies for Advanced Encryption Standard (AES) for high speed, ultra-low power, ultra-low energy IoT applications with multiple levels of security. Our design supports multiple security levels through different key sizes, power and energy optimization for both datapath and  key expansion. The estimated power results show that our  implementation may achieve an energy per bit comparable with  the lightweight standardized algorithm PRESENT of less than  1pJ/bit at 10MHz at 0.6V with throughput of 28Mbps in ST  FDSOI 28nm technology. In terms of security evaluation, our  proposed datapath, 32-bit key out of 128 bits cannot be revealed by Correlation Power Analysis (CPA) attack using less than 20 thousand traces.