relation: https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2619/
title: Electric Properties and Interface Charge Trap Density of Ferroelectric Gate Thin Film Transistor Using (Bi,La)4Ti3O12/Pb(Zr,Ti)O3 Stacked Gate Insulator
creator: Pham, Van Thanh
creator: Bui, Nguyen Quoc Trinh
creator: Takaaki, Miyasako
creator: Phan, Trong Tue
creator: Eisuke, Tokumitsu
creator: Tatsuya, Shimoda
subject: ISI-indexed journals
description: We successfully fabricated ferroelectric gate thin film transistors (FGTs) using solution-processed (Bi,La)4Ti3O12 (BLT)/Pb(Zr,Ti)O3 (PZT)  stacked films and an indium–tin oxide (ITO) film as ferroelectric gate insulators and an oxide channel, respectively. The typical n-type channel  transistors were obtained with the counterclockwise hysteresis loop due to the ferroelectric property of the BLT/PZT stacked gate insulators.  These FGTs exhibited good device performance characteristics, such as a high ON/OFF ratio of 106, a large memory window of 1.7–3.1 V, and a  large ON current of 0.5–2.5 mA. In order to investigate interface charge trapping for these devices, we applied the conductance method to MFS  capacitors, i.e., Pt/ITO/BLT/PZT/Pt capacitors. As a result, the interface charge trap density (Dit) between the ITO and BLT/PZT stacked films  was estimated to be in the range of 10�11–10�12 eV�1 cm�2. The small Dit value suggested that good interfaces were achieved.
date: 2012-09-20
type: Article
type: PeerReviewed
format: application/pdf
language: en
identifier: https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2619/1/10.%20JJAP2012%20-51-09LA09.pdf
identifier:   Pham, Van Thanh and Bui, Nguyen Quoc Trinh and Takaaki, Miyasako and Phan, Trong Tue and Eisuke, Tokumitsu and Tatsuya, Shimoda  (2012) Electric Properties and Interface Charge Trap Density of Ferroelectric Gate Thin Film Transistor Using (Bi,La)4Ti3O12/Pb(Zr,Ti)O3 Stacked Gate Insulator.  Japanese Journal of Applied Physics, 2014, 51 .   09LA09.  ISSN 0021-4922