eprintid: 29
rev_number: 13
eprint_status: archive
userid: 1
dir: disk0/00/00/00/29
datestamp: 2012-02-16 09:28:18
lastmod: 2017-01-17 02:44:08
status_changed: 2012-02-16 09:28:18
type: conference_item
metadata_visibility: show
item_issues_count: 0
creators_name: Tran, Xuan Tu
creators_name: Beroulle, Vincent
creators_name: Bertrand, François
creators_name: Durupt, Jean
creators_name: Robach, Chantal
creators_id: tutx@vnu.edu.vn
title: A DFT Architecture for Asynchronous Networks-on-Chip
ispublished: pub
subjects: ECE
subjects: ElectronicsandComputerEngineering
divisions: fac_fet
divisions: lab_sis
date: 2006-05-25
date_type: published
full_text_status: none
pres_type: paper
place_of_pub: Southampton, UK
pagerange: 219-224
event_title: The 11th IEEE European Test Symposium (ETS)
event_location: Prague, Czech
event_dates: 2006
event_type: conference
refereed: TRUE
citation:   Tran, Xuan Tu and Beroulle, Vincent and Bertrand, François and Durupt, Jean and Robach, Chantal  (2006) A DFT Architecture for Asynchronous Networks-on-Chip.  In: The 11th IEEE European Test Symposium (ETS), 2006, Prague, Czech.