@article{SisLab2913,
          volume = {8},
          number = {2},
           month = {April},
          author = {Tuan Anh Vu},
           title = {A 60 GHz CMOS Power Amplifier for Wireless Communications},
       publisher = {Institute of Advanced Engineering and Science},
         journal = {International Journal of Electrical and Computer Engineering},
            year = {2018},
             url = {https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2913/},
        abstract = {This paper presents a 60 GHz power amplifier (PA) suitable for wireless communications. The two-stage wideband PA is fabricated in 55 nm CMOS. Measurement results show that the PA obtains a peak gain of 16 dB over a -3 dB bandwidth from 57 GHz to 67 GHz. It archives an output 1 dB compression point (OP1dB) of 4 dbm and a peak power added efficiency (PAE) of 12.6\%. The PA consumes a total DC power of 38.3 mW from a 1.2 V supply voltage while its core occupies a chip area of 0.45 mm2.}
}