%0 Journal Article %@ 1558-1764 %A Vu, Tuan Anh %A Takano, Kyoya %A Fujishima, Minoru %D 2018 %F SisLab:2926 %J IEEE Microwave and Wireless Components Letters %N 4 %P 341-343 %T 300-GHz Balanced Varactor Doubler in Silicon CMOS for Ultrahigh-Speed Wireless Communications %U https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2926/ %V 28 %X This letter presents a 300 GHz transmitter front-end suitable for ultrahigh-speed wireless communications. The transmitter front-end realized in TSMC 40 nm CMOS consists of a varactor based doubler driven by a three-stage D-band power amplifier (PA). Measurement results show that the D-band PA obtains a saturated power of 6.1 dBm and a power added efficiency (PAE) of 4.3%. The balanced varactor doubler results in an output power of -12 dBm at 300 GHz. The transmitter front-end consumes a total DC power of 72.9 mW from a 0.9 V supply voltage while it occupies an area of 0.72 mm2.