?url_ver=Z39.88-2004&rft_id=US9984956B2&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Adc&rft.relation=https%3A%2F%2Feprints.uet.vnu.edu.vn%2Feprints%2Fid%2Feprint%2F3017%2F&rft.title=Through+electrode%2C+manufacturing+method+thereof%2C+and+semiconductor+device+and+manufacturing+method+thereof&rft.creator=Aoyagi%2C+Masahiro&rft.creator=Bui%2C+Thanh+Tung&rft.creator=Watanabe%2C+Naoya&rft.creator=Kato%2C+Fumiki&rft.creator=Kikuchi%2C+Katsuya&rft.subject=Electronics+and+Communications&rft.subject=Electronics+and+Computer+Engineering&rft.description=Provided+are+a+through+electrode+including+an+organic+side-wall+insulating+film%2C+capable+of+eliminating+a+barrier+layer+and+achieving+satisfactory+mechanical+reliability+and+electrical+reliability+and+a+manufacturing+method+thereof%2C+and+a+semiconductor+device+and+a+manufacturing+method+thereof.+According+to+one+aspect+of+the+present+invention%2C+a+through+electrode+disposed+in+a+semiconductor+substrate+is+provided%2C+including%3A+a+copper+layer+in+the+semiconductor+substrate%3B+and+a+side-wall+insulating+film+that+is+disposed+between+the+copper+layer+and+the+semiconductor+substrate+so+as+to+be+in+contact+with+the+copper+layer+and+the+semiconductor+substrate%2C+the+side-wall+insulating+film+being+represented+by+the+following+chemical+formula+(1).&rft.date=2018-05-29&rft.type=Patent&rft.type=NonPeerReviewed&rft.identifier=++US20160322282A1++(2018)+Through+electrode%2C+manufacturing+method+thereof%2C+and+semiconductor+device+and+manufacturing+method+thereof.++US9984956B2.+++&rft.relation=https%3A%2F%2Fpatents.google.com%2Fpatent%2FUS9984956B2%2Fen&rft.relation=US9984956B2