TY  - INPR
ID  - SisLab3052
UR  - http://atc-conf.org/
A1  - Dao, Manh Hiep
A1  - Hoang, Van Phuc
A1  - Dao, Van Lan
A1  - Tran, Xuan Tu
Y1  - 2018/10/18/
N2  - This paper presents a low energy AES encryption core targeting for hardware security implementation in IoT systems. The proposed AES core architecture employs the improved shared S-box scheme with 32-bit datapath and low switching activity shift-row operation. Consequently, the proposed AES encryption core can provide good tradeoff with the area of 4.3 kgates and the energy consumption of 4 pJ/bit in 32 nm CMOS technology library.
TI  - An Energy Efficient AES Encryption Core for Hardware Security Implementation in IoT Systems
SP  - 301
M2  - Ho Chi Minh city, Vietnam
AV  - none
EP  - 304
T2  - 2018 International Conference on Advanced Technologies for Communications (ATC)
ER  -