%0 Conference Paper
%A Ikechukwu, Ogbodo Mark
%A Vu, The H.
%A Dang, Nam Khanh
%A Abdallah, Abderazek Ben
%B The 7th IEEE International Conference on Big Data and Smart Computing
%C Jeju, Korea
%D 2020
%F SisLab:3676
%T Light-weight Spiking Neuron Processing Core for  Large-scale 3D-NoC based Spiking Neural Network  Processing Systems
%U https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3676/
%X With the increasing demand for computing machines  that more closely model the biological brain, the field  of neuro-inspired computing has progressed to the exploration  of Spiking Neural Networks (SNN), and to best the challenges of  conventional Von Neumann architecture, several hardware-based  (neuromorphic) chips have been designed. A neuromorphic chip  is based on spiking neurons which process input information  only when they receive spike signals. Given a sparsely-distributed  input spike train, the power consumption for such event-driven  hardware would be reduced since large portions of the network  that are not driven by incoming spikes can be set into a powergated  mode. The challenges that need to be solved toward  building in hardware such a spiking neuromorphic chip with a  massive number of synapse include building small-sized spiking  neuro-cores with low-power consumption, efficient neurocoding  scheme, and lightweight on-chip learning algorithm. In this paper,  we present the hardware implementation and evaluation of a  light-weight spiking neuron processing core (SNPC) for our 3DNoC  SNN processor, and the design of its on-chip learning block.  The SNPC embeds 256 Leaky Integrate and Fire (LIF) neurons,  and crossbar based synapses, covering a chip area of 0.12mm2.  Its performance is evaluated using MNIST dataset, achieving an  inference accuracy of 97.55%.