@article{SisLab3927,
           title = {2D-PPC: A single-correction multiple-detection method for Through-Silicon-Via Faults},
          author = {Nam Khanh Dang and Michael Meyer and Akram Ben Ahmed and Abderazek Ben Abdallah and Xuan Tu Tran},
            year = {2020},
         journal = {REV Journal on Electronics and Communications},
             url = {https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3927/},
        abstract = {Through-Silicon-Via (TSV) is one of the most promising technologies to realize 3D Integrated Circuits (3D-ICs). 
However, the reliability issues due to the low yield rates and the sensitivity to thermal hotspots and stress issues are preventing TSV-based 3D-ICs from being widely and efficiently used. To enhance the reliability of TSV connections, using error correction code to detect and correct faults automatically has been demonstrated as a viable solution.
This paper presents a 2D Parity Product Code (2D-PPC) for TSV fault-tolerance with the ability to correct one fault and detect, at least, two faults. 
In an implementation of 64-bit data and 81-bit code-word, 2D-PPC can detect over 71 faults, on average. 
Its encoder and decoder decrease the overall latency by 38.33{$\backslash$}\% when compared to the Single Error Correction Double Error Detection code. 
In addition to the high detection rates, the encoder can detect 100{$\backslash$}\% of its gate failures, and the decoder can detect and correct around 40{$\backslash$}\% of its individual gate failures. The squared 2D-PPC could be extended using orthogonal Latin square to support extra bit correction.}
}