eprintid: 4081
rev_number: 11
eprint_status: archive
userid: 4
dir: disk0/00/00/40/81
datestamp: 2020-10-13 08:45:45
lastmod: 2020-10-13 08:45:45
status_changed: 2020-10-13 08:45:45
type: article
metadata_visibility: show
creators_name: Hoang, Trong Thuc
creators_name: Duran, Ckristian
creators_name: Nguyen, Khai Duy
creators_name: Dang, Tuan Kiet
creators_name: Nguyen, Quang Nhu Quynh
creators_name: Than, Phuc Hong
creators_name: Tran, Xuan Tu
creators_name: Le, Duc Hung
creators_name: Tsukamoto, Akira
creators_name: Suzaki, Kuniyasu
creators_name: Pham, Cong Kha
creators_id: tutx@vnu.edu.vn
creators_id: pham@ee.uec.ac.jp
title: Low-power High-performance 32-bit RISC-V Microcontroller on 65-nm Silicon-On-Thin-BOX (SOTB)
ispublished: pub
subjects: ElectronicsandComputerEngineering
subjects: Scopus
subjects: isi
divisions: lab_sis
abstract: In this paper, a 32-bit RISC-V microcontroller in a 65-nm Silicon-On-Thin-BOX (SOTB) chip is presented. The system is developed based on the VexRiscv Central Processing Unit (CPU) with the Instruction Set Architecture (ISA) extensions of RV32IM. Besides the core processor, the System-on-Chip (SoC) contains 8KB of boot ROM, 64KB of on-chip memory, UART controller, SPI controller, timer, and GPIOs for LEDs and switches. The 8KB of boot ROM has 7KB of hard-code in combinational logics and 1KB of a stack in SRAM. The proposed SoC performs the Dhrystone and Coremark benchmarks with the results of 1.27 DMIPS/MHz and 2.4 Coremark/MHz, respectively. The layout occupies 1.32-mm2 of die area, which equivalents to 349,061 of NAND2 gate-counts. The 65-nm SOTB process is chosen not only because of its low-power feature but also because of the back-gate biasing technique that allows us to control the microcontroller to favor the low-power or the high-performance operations. The measurement results show that the highest operating frequency of 156-MHz is achieved at 1.2-V supply voltage (VDD) with +1.6-V back-gate bias voltage (VBB). The best power density of 33.4-µW/MHz is reached at 0.5-V VDD with +0.8-V VBB. The least current leakage of 3-nA is retrieved at 0.5-V VDD with -2.0-V VBB.
date: 2020
date_type: published
publisher: IEICE
official_url: https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_17.20200282/_article
id_number: 10.1587/elex.17.20200282
full_text_status: public
publication: IEICE Electronics Express
volume: VV
refereed: TRUE
issn: 1349-2543
citation:   Hoang, Trong Thuc and Duran, Ckristian and Nguyen, Khai Duy and Dang, Tuan Kiet and Nguyen, Quang Nhu Quynh and Than, Phuc Hong and Tran, Xuan Tu and Le, Duc Hung and Tsukamoto, Akira and Suzaki, Kuniyasu and Pham, Cong Kha  (2020) Low-power High-performance 32-bit RISC-V Microcontroller on 65-nm Silicon-On-Thin-BOX (SOTB).  IEICE Electronics Express, VV .    ISSN 1349-2543     
document_url: https://eprints.uet.vnu.edu.vn/eprints/id/eprint/4081/1/2020XCL0282_P1_oboScI-1.pdf