eprintid: 4087
rev_number: 9
eprint_status: archive
userid: 4
dir: disk0/00/00/40/87
datestamp: 2020-11-26 04:47:14
lastmod: 2020-11-26 04:47:14
status_changed: 2020-11-26 04:47:14
type: article
metadata_visibility: show
creators_name: Al-Shatari, Mohammed Omar Awadh
creators_name: Hussin, Fawnizu Azmadi
creators_name: Aziz, Azrina Abd
creators_name: Witjaksono, Gunawan
creators_name: Tran, Xuan Tu
creators_id: m.alshatari@gmail.com
creators_id: fawnizu@utp.edu.my
creators_id: azrina_aaziz@utp.edu.my
creators_id: gwitjaksono@binus.edu
creators_id: tutx@vnu.edu.vn
title: FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices
ispublished: pub
subjects: ECE
subjects: ElectronicsandComputerEngineering
subjects: Scopus
subjects: isi
divisions: lab_sis
abstract: The design of cryptographic engines for the Internet of Things (IoT) edge devices and other ultralightweight devices is a crucial challenge. The emergence of such resource-constrained devices raises significant challenges to current cryptographic algorithms. PHOTON is an ultra-lightweight cryptographic hash function targeting low-resource devices. The currently implemented hardware architectures of PHOTON hash function utilize a large amount of resources and have low operating frequencies with a low rate of throughputs. Maximum operating frequency and throughput of PHOTON architecture can be improved but at the cost of larger area utilization. Therefore, to improve the area-performance trade-offs of PHOTON hash function, an iterative architecture is implemented in this work. The concern is with the most lightweight version of PHOTON hash function with the hash size of 80 bits. It is implemented and verified on several Xilinx and Altera Field Programmable Gate Array (FPGA) devices using their synthesis and simulation tools. Low-cost and high-processing FPGA devices were both considered. The design is optimized for performance, whereas the area utilization is also taken into consideration. The overall performance and logic utilization are benchmarked with the existing implementations. The results show an improvement rate of 10.26% to 51.04% in the speed performance and a reduction rate of 7.55% to 60.64% in area utilization compared to existing implementations of PHOTON hash functions.
date: 2020-11
date_type: published
publisher: IEEE
official_url: http://dx.doi.org/10.1109/ACCESS.2020.3038219
id_number: 10.1109/ACCESS.2020.3038219
contact_email: tutx@vnu.edu.vn
full_text_status: public
publication: IEEE Access
volume: 8
pagerange: 207610-207618
refereed: TRUE
issn: 2169-3536
citation:   Al-Shatari, Mohammed Omar Awadh and Hussin, Fawnizu Azmadi and Aziz, Azrina Abd and Witjaksono, Gunawan and Tran, Xuan Tu  (2020) FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices.  IEEE Access, 8 .   pp. 207610-207618.  ISSN 2169-3536     
document_url: https://eprints.uet.vnu.edu.vn/eprints/id/eprint/4087/1/Access-2020-40888_Proof_hi.pdf