eprintid: 421
rev_number: 9
eprint_status: archive
userid: 4
dir: disk0/00/00/04/21
datestamp: 2014-12-26 07:32:56
lastmod: 2017-01-17 02:27:40
status_changed: 2014-12-26 07:32:56
type: conference_item
metadata_visibility: show
creators_name: Dang, Nam Khanh
creators_name: Tran, Xuan Tu
creators_name: Merigot, Alain
creators_id: dnk0904@gmail.com
creators_id: tutx@vnu.edu.vn
title: An Efficient Hardware Architecture for Inter-Prediction in H. 264/AVC Encoders
ispublished: pub
subjects: ECE
subjects: ElectronicsandComputerEngineering
divisions: fac_fet
divisions: lab_sis
abstract: In this paper, we propose a design methodology for the inter-prediction in H.264/AVC codecs by addressing the relationship between its main processes. The target of this methodology is to optimize the design in order to get better performance while keeping a reasonable design cost. An efficient hardware architecture for the inter-prediction in H.264/AVC codecs is then proposed with three key techniques: a modified full search algorithm with bandwidth efficiency, pipelining technique, and data reuse strategy. With this approach, the inter-prediction has been successfully designed and implemented with a CMOS 180nm technology which provides low cost in terms of latency, hardware overhead and memory bandwidth. The design is initially targeted to CIF video format; however, it is obviously suitable for real-time HD 1080p video format.
date: 2014-04-23
date_type: published
contact_email: tutx@vnu.edu.vn
full_text_status: restricted
pres_type: paper
pagerange: 294-297
event_title: The 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems
event_location: Warsaw, Poland
event_dates: April 23-25, 2014
event_type: conference
refereed: TRUE
related_url_url: http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6868813
related_url_type: pub
projects: QGĐA.10.02
citation:   Dang, Nam Khanh and Tran, Xuan Tu and Merigot, Alain  (2014) An Efficient Hardware Architecture for Inter-Prediction in H. 264/AVC Encoders.  In: The 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, April 23-25, 2014, Warsaw, Poland.     
document_url: https://eprints.uet.vnu.edu.vn/eprints/id/eprint/421/1/Dang2014aeh.pdf