%0 Conference Paper
%A Nguyen, Ngoc-Mai
%A Beigne, Edith
%A Lesecq, Suzanne
%A Bui, Duy Hieu
%A Dang, Nam Khanh
%A Tran, Xuan Tu
%B 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014)
%C Okinawa, Japan
%D 2014
%F SisLab:430
%P 77-80
%T H.264/AVC Hardware Encoders and Low-Power Features
%U https://eprints.uet.vnu.edu.vn/eprints/id/eprint/430/
%X Because of significant bit rate reduction in comparison to the previous video compression standards, the H.264/AVC has been successfully used in a wide range of applications. In hardware design for H.264/AVC video encoders, power reduction is currently a tremendous challenge. This paper presents a survey of different H.264/AVC hardware encoders focusing on power features and power reduction techniques to be applied. A new H.264/AVC hardware encoder, named VENGME, is proposed. This low power encoder is a four-stage architecture with memory access reduction, in which, each module has been optimized. The actual total power consumption, estimated at RTL level, is 19.1mW.