eprintid: 48
rev_number: 10
eprint_status: archive
userid: 4
dir: disk0/00/00/00/48
datestamp: 2012-11-02 06:10:35
lastmod: 2017-01-17 02:35:45
status_changed: 2012-11-02 06:10:35
type: conference_item
metadata_visibility: show
creators_name: Dang, Nam Khanh
creators_name: Le, Van Thanh Vu
creators_name: Tran, Xuan Tu
creators_id: dnk0904@gmail.com
creators_id: vulvt@husc.edu.vn
creators_id: tutx@vnu.edu.vn
corp_creators: VNU-UET
title: FPGA Implementation of a Low Latency and High Throughput Network-on-Chip Router Architecture
ispublished: pub
subjects: ECE
subjects: Electronics
subjects: ElectronicsandComputerEngineering
divisions: fac_fet
divisions: lab_sis
keywords: Network-on-Chip
note: ISBN: 978-4-88552-258-1
abstract: The Network-on-Chip (NoC) paradigm has recently been known as a promising solution for designing large complex Systems-on-Chip (SoCs), especially when the semiconductor technology turns into 3D integration era. This paper presents the design of a NoC router architecture which provides low latency, high throughput communication. The NoC router architecture is implemented on a Xilinx technology FPGA chip for prototyping purpose with an obtained latency of 8.1ns and a maximum throughput of 123Mflits/s on each communication channel. These results can be improved when the design is implemented with ASIC design flows.
date: 2011-08-08
date_type: published
full_text_status: public
pres_type: paper
pagerange: 112-116
event_title: The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011)
event_location: Hanoi, Vietnam
event_dates: 8-10 August 2011
event_type: conference
refereed: TRUE
projects: QGDA.10.02
citation:   Dang, Nam Khanh and Le, Van Thanh Vu and Tran, Xuan Tu  (2011) FPGA Implementation of a Low Latency and High Throughput Network-on-Chip Router Architecture.  In: The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 8-10 August 2011, Hanoi, Vietnam.     
document_url: https://eprints.uet.vnu.edu.vn/eprints/id/eprint/48/1/IEICE2011%20normal%20router%20for%20NoCs%20-%2010-FINAL.pdf