@inproceedings{SisLab50,
       booktitle = {The International Conference on Consumer Electronics, Communications and Networks (IEEE CECNet 2011)},
           month = {April},
           title = {An Efficient Architecture Design for VGA Monitor Controller},
          author = {Van Huan Tran and Xuan Tu Tran},
            year = {2011},
           pages = {3917--3921},
            note = {ISBN: 978-1-61284-459-6},
             url = {https://eprints.uet.vnu.edu.vn/eprints/id/eprint/50/},
        abstract = {In this paper, we present the design and implementation of an efficient hardware architecture for VGA monitor controllers based on FPGA technology. The design is compatible with PLB bus and has a high potential to be used in Xilinx FPGA-based systems. The ability to provide multiple display resolutions (up to WXGA 1280x800) and a customizable internal FIFO make the proposed architecture suitable for several FPGA devices. Furthermore, we have also offered a useful software library to enable the text mode feature. These highlight features have been validated through the demonstration of an application.}
}