%0 Conference Paper
%A Tran, Van Huan
%A Tran, Xuan Tu
%A VNU-UET,
%B The International Conference on Consumer Electronics, Communications and Networks (IEEE CECNet 2011)
%C Hubei, China
%D 2011
%F SisLab:50
%P 3917-3921
%T An Efficient Architecture Design for VGA Monitor Controller
%U https://eprints.uet.vnu.edu.vn/eprints/id/eprint/50/
%X In this paper, we present the design and implementation of an efficient hardware architecture for VGA monitor controllers based on FPGA technology. The design is compatible with PLB bus and has a high potential to be used in Xilinx FPGA-based systems. The ability to provide multiple display resolutions (up to WXGA 1280x800) and a customizable internal FIFO make the proposed architecture suitable for several FPGA devices. Furthermore, we have also offered a useful software library to enable the text mode feature. These highlight features have been validated through the demonstration of an application.
%Z ISBN: 978-1-61284-459-6