eprintid: 50
rev_number: 10
eprint_status: archive
userid: 4
dir: disk0/00/00/00/50
datestamp: 2012-11-02 06:19:52
lastmod: 2017-01-17 02:37:01
status_changed: 2012-11-02 06:19:52
type: conference_item
metadata_visibility: show
creators_name: Tran, Van Huan
creators_name: Tran, Xuan Tu
creators_id: huantv@vnu.edu.vn
creators_id: tutx@vnu.edu.vn
corp_creators: VNU-UET
title: An Efficient Architecture Design for VGA Monitor Controller
ispublished: pub
subjects: ECE
subjects: Electronics
subjects: ElectronicsandComputerEngineering
divisions: fac_fet
divisions: lab_sis
note: ISBN: 978-1-61284-459-6
abstract: In this paper, we present the design and implementation of an efficient hardware architecture for VGA monitor controllers based on FPGA technology. The design is compatible with PLB bus and has a high potential to be used in Xilinx FPGA-based systems. The ability to provide multiple display resolutions (up to WXGA 1280x800) and a customizable internal FIFO make the proposed architecture suitable for several FPGA devices. Furthermore, we have also offered a useful software library to enable the text mode feature. These highlight features have been validated through the demonstration of an application.
date: 2011-04
date_type: published
full_text_status: public
pres_type: paper
pagerange: 3917-3921
event_title: The International Conference on Consumer Electronics, Communications and Networks (IEEE CECNet 2011)
event_location: Hubei, China
event_dates: 16-18 April 2011
event_type: conference
refereed: TRUE
projects: PUF.08.06
citation:   Tran, Van Huan and Tran, Xuan Tu  (2011) An Efficient Architecture Design for VGA Monitor Controller.  In: The International Conference on Consumer Electronics, Communications and Networks (IEEE CECNet 2011), 16-18 April 2011, Hubei, China.     
document_url: https://eprints.uet.vnu.edu.vn/eprints/id/eprint/50/1/CECNET2011-VGA-FINAL%20submission.pdf