%0 Conference Paper
%A Tran, Van Huan
%A Nguyen, Ngoc Mai
%A Nguyen, Van Mien
%A Tran, Xuan Tu
%A VNU-UET,
%B The 1st Solid-State Systems Symposium (4S)
%C Ho Chi Minh city
%D 2010
%F SisLab:54
%K Integer Transform, Quantization, H.264/AVC Encoder
%P 231-236
%T Low Cost and High Performance Implementation of Forward Transform and Quantization for an H.264/AVC Encoder
%U https://eprints.uet.vnu.edu.vn/eprints/id/eprint/54/
%X This paper presents a low-cost and high-performance  hardware design of forward transform and quantization (FTQ)  for an H.264/AVC encoder. To minimize the hardware implementation cost, in this design we use only one unified architecture of 1D transform engine to perform all transform processes. While the performance of the design is improved by using a fast architecture of the multiplier in the quantizer. Furthermore, this architecture also enables to share the common part among multipliers that have the same multiplicand. The design has been implemented using FPGA technologies for prototyping purpose. Experimental results show that our architecture can completely finish transform and quantization processes of a 4:2:0 macroblock  in 228 clock cycles and the achieved performance is 115  MHz on a Virtex-II device (Xilinx) or 163 MHz on a Stratix-II device (Altera).