TY  - CONF
ID  - SisLab56
UR  - https://eprints.uet.vnu.edu.vn/eprints/id/eprint/56/
A1  - Tran, Xuan Tu
A1  - Phan, Hai Phong
A1  - Tran, Van Huan
A1  - Tran, Quang Vinh
A1  - Nguyen, Ngoc Binh
Y1  - 2010/03/10/
N2  - To meet the increasing demands of recent applications, systems-on-chips (SoCs) are more and more complex and one system can be composed of many computing resources. The communication solution between these resources becomes one of big challenges in the design of SoCs. In this paper, we present the design and implementation of an AMBA Advanced High-performance Bus based bus architecture for a SoC platform on a Xilinx Virtex-4 XC4VLX40 FPGA. This architecture includes bus master and bus slave wrappers in order to ease the integration of intellectual property cores in systems. Simulation and implementation results are also reported and analyzed to prove the performance of the designed architecture.
TI  - Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA
SP  - 169
M2  - Okinawa, Japan
AV  - none
EP  - 174
T2  - The IEICE VLSI Design Technologies (VLD) Conference
ER  -