eprintid: 56 rev_number: 12 eprint_status: archive userid: 4 dir: disk0/00/00/00/56 datestamp: 2012-11-05 03:48:27 lastmod: 2017-01-17 02:39:36 status_changed: 2012-11-05 03:48:27 type: conference_item metadata_visibility: show creators_name: Tran, Xuan Tu creators_name: Phan, Hai Phong creators_name: Tran, Van Huan creators_name: Tran, Quang Vinh creators_name: Nguyen, Ngoc Binh creators_id: tutx@vnu.edu.vn creators_id: haiphongphan@gmail.com creators_id: huantv@vnu.edu.vn creators_id: vinhtq@vnu.edu.vn creators_id: nnbinh@vnu.edu.vn corp_creators: VNU-UET title: Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA ispublished: pub subjects: ECE subjects: Electronics subjects: ElectronicsandComputerEngineering subjects: IT subjects: IT_GS divisions: fac_fet divisions: fac_fit divisions: lab_sis abstract: To meet the increasing demands of recent applications, systems-on-chips (SoCs) are more and more complex and one system can be composed of many computing resources. The communication solution between these resources becomes one of big challenges in the design of SoCs. In this paper, we present the design and implementation of an AMBA Advanced High-performance Bus based bus architecture for a SoC platform on a Xilinx Virtex-4 XC4VLX40 FPGA. This architecture includes bus master and bus slave wrappers in order to ease the integration of intellectual property cores in systems. Simulation and implementation results are also reported and analyzed to prove the performance of the designed architecture. date: 2010-03-10 date_type: published full_text_status: none pres_type: paper pagerange: 169-174 event_title: The IEICE VLSI Design Technologies (VLD) Conference event_location: Okinawa, Japan event_dates: 10-12 March 2010 event_type: conference refereed: TRUE citation: Tran, Xuan Tu and Phan, Hai Phong and Tran, Van Huan and Tran, Quang Vinh and Nguyen, Ngoc Binh (2010) Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA. In: The IEICE VLSI Design Technologies (VLD) Conference, 10-12 March 2010, Okinawa, Japan.