Nguyen, Tung and Bui, Duy Hieu and Phan, Hai Phong and Dang, Trong Trinh and Tran, Xuan Tu (2013) High-Performance Adaption of ARM Processor into Network-on-Chip Architectures. In: The 26th IEEE International System-on-Chip Conference (SOCC), 4-6 September 2013, Erlangen, Germany.
|
PDF
- Accepted Version
Download (589kB) | Preview |
Abstract
The demand for system scalability, reusability, and the decoupling between computation and communication have motivated the growth of Network-on-Chip (NoC) paradigm in the recent years. The system design has changed from the computation centric design to the communication centric design. Researchers have proposed a number of NoC architectures. Most of these works focus on network architectures and routing algorithms, however, the interfaces between network architectures and processing units also need to be addressed to improve the overall performance of the system. This paper presents an efficient AXI (Advanced eXtensible Interface) compliant network adapter for 2D mesh Wormhole-based NoC architectures, named AXI-NoC adapter. The proposed network adapter achieves high frequency of 650MHz with a low area footprint (952 cells, approximate to 2,793um2 with a CMOS 45nm technology) by using an effective micro-architecture and with zero latency by using the mux-selection method.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Subjects: | Electronics and Communications Electronics and Communications > Electronics and Computer Engineering |
| Divisions: | Faculty of Electronics and Telecommunications (FET) Key Laboratory for Smart Integrated Systems (SISLAB) |
| Depositing User: | Prof. Xuan-Tu Tran |
| Date Deposited: | 17 Jul 2013 04:35 |
| Last Modified: | 17 Jan 2017 02:30 |
| URI: | http://eprints.uet.vnu.edu.vn/eprints/id/eprint/169 |
Actions (login required)
 |
View Item |
