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300-GHz Balanced Varactor Doubler in Silicon CMOS for Ultrahigh-Speed Wireless Communications

Vu, Tuan Anh and Takano, Kyoya and Fujishima, Minoru (2018) 300-GHz Balanced Varactor Doubler in Silicon CMOS for Ultrahigh-Speed Wireless Communications. IEEE Microwave and Wireless Components Letters, 28 (4). pp. 341-343. ISSN 1558-1764

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Abstract

This letter presents a 300 GHz transmitter front-end suitable for ultrahigh-speed wireless communications. The transmitter front-end realized in TSMC 40 nm CMOS consists of a varactor based doubler driven by a three-stage D-band power amplifier (PA). Measurement results show that the D-band PA obtains a saturated power of 6.1 dBm and a power added efficiency (PAE) of 4.3%. The balanced varactor doubler results in an output power of -12 dBm at 300 GHz. The transmitter front-end consumes a total DC power of 72.9 mW from a 0.9 V supply voltage while it occupies an area of 0.72 mm2.

Item Type: Article
Subjects: Electronics and Communications
ISI-indexed journals
Divisions: Faculty of Electronics and Telecommunications (FET)
Depositing User: Vu Tuan Anh
Date Deposited: 10 Apr 2018 06:34
Last Modified: 10 Apr 2018 06:34
URI: http://eprints.uet.vnu.edu.vn/eprints/id/eprint/2926

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