Nguyen, Ngo Doanh and Bui, Duy Hieu and Hussin, Fawnizu Azmadi and Tran, Xuan Tu
(2022)
An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection.
In: 2022 International Conference on IC Design and Technology (ICICDT 2022), 21-23 September 2022, Hanoi, Vietnam.
(In Press)
Abstract
This article presents an adaptive hardware architecture for high-performance object detection using Histogram of Oriented Gradient (HOG) features in combination with Supported Vector Machines (SVM). This architecture can adapt
to various bit-width representations of HOG features by using the quantization technique. The HOG features can be represented from 8 bits to 4 bits to remove the bubble in the processing pipeline and reduce the memory footprint. As a result, the overall throughput is robustly increased as the number of bits decreases. Moreover, we propose a new cell-reused strategy to speed up the system throughput and reduce memory footprint. The proposed architecture has been implemented in TSMC 65nm technology with a maximum operating frequency of 500MHz and throughput of 3.98Gbps. The total hardware area cost is about 167KGEs and 212kb SRAMs.
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