Tran, Van Huan and Tran, Xuan Tu (2011) An Efficient Architecture Design for VGA Monitor Controller. In: The International Conference on Consumer Electronics, Communications and Networks (IEEE CECNet 2011), 16-18 April 2011, Hubei, China.
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Abstract
In this paper, we present the design and implementation of an efficient hardware architecture for VGA monitor controllers based on FPGA technology. The design is compatible with PLB bus and has a high potential to be used in Xilinx FPGA-based systems. The ability to provide multiple display resolutions (up to WXGA 1280x800) and a customizable internal FIFO make the proposed architecture suitable for several FPGA devices. Furthermore, we have also offered a useful software library to enable the text mode feature. These highlight features have been validated through the demonstration of an application.
| Item Type: | Conference or Workshop Item (Paper) |
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| Additional Information: | ISBN: 978-1-61284-459-6 |
| Subjects: | Electronics and Communications ?? Electronics ?? Electronics and Communications > Electronics and Computer Engineering |
| Divisions: | Faculty of Electronics and Telecommunications (FET) Key Laboratory for Smart Integrated Systems (SISLAB) |
| Depositing User: | Prof. Xuan-Tu Tran |
| Date Deposited: | 02 Nov 2012 06:19 |
| Last Modified: | 17 Jan 2017 02:37 |
| URI: | http://eprints.uet.vnu.edu.vn/eprints/id/eprint/50 |
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