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Items where Author is "Bui, Duy Hieu"

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Number of items: 26.

Article

Tran, Xuan Tu and Nguyen, Ngoc Sinh and Bui, Duy Hieu and Nguyen, Kiem Hung and Pham, Minh Trien and Pham, Cong Kha (2020) Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Error in Stationary Blocks. EAI Transactions on Industrial Networks and Intelligent Systems . ISSN 2410-0218

Tran, Dinh Lam and Tran, Xuan Tu and Bui, Duy Hieu and Pham, Cong Kha (2020) An Efficient Hardware Implementation of Residual Data Binarization in HEVC CABAC Encoder. Electronics, 9 (4). p. 684. ISSN 2079-9292

Belleville, Marc and Molnos, Anca and Sicard, Gilles and Christmann, Jean Frederic and Morche, Dominique and Bui, Duy Hieu and Puschini, Diego and Lesecq, Suzanne and Beigne, Edith (2017) Adaptive Architectures, Circuits and Technology Solutions for Future IoT Systems. Journal of Low Power Electronics, 13 (3). pp. 298-309. ISSN 1546-1998

Tran, Xuan Tu and Nguyen, Tung and Phan, Hai Phong and Bui, Duy Hieu (2017) ​AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E100-A (8). pp. 1650-1660. ISSN 1745-1337

Bui, Duy Hieu and Puschini, Diego and Bacles-Min, Simone and Beigne, Edith and Tran, Xuan Tu (2017) AES datapath optimization strategies for low-power low-energy multi-security-level Internet-of-Thing applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25 (12). pp. 3281-3290. ISSN 1063-8210

Nguyen, Ngoc Mai and Bui, Duy Hieu and Dang, Nam Khanh and Beigne, Edith and Lesecq, Suzanne and Vivet, Pascal and Tran, Xuan Tu (2014) An Overview of H.264 Hardware Encoder Architectures including Low-Power Features. REV Journal on Electronics and Communications, 4 (1-2). pp. 34-43. ISSN 1859-378X

Book Section

Tran, Xuan Tu and Dang, Nam Khanh and Bui, Duy Hieu and Merigot, Alain (2021) Low Cost Inter-prediction Architecture in H.264/AVC Encoders with an Efficient Data Reuse Strategy. In: Advances in Engineering Research. Nova Science Publishers. ISBN 978-1-53618-929-2

Conference or Workshop Item

Tran, Duc Manh and Bui, Duy Hieu and Tran, Thi Thuy Quynh and Le, Van Thanh Vu and Tran, Xuan Tu (2020) Thiết kế bộ khuếch đại công suất cao tần hiệu suất cao trên công nghệ CMOS 65nm cho các ứng dụng IoT tốc độ cao. In: 23rd National Conference on Electronics, Communications and Information Technology (REV-ECIT), 19 December 2020, Hanoi, Vietnam.

Nguyen, Ngo Doanh and Bui, Duy Hieu and Tran, Xuan Tu (2020) A Lightweight AEAD encryption core to secure IoT applications. In: 2020 16th IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 8-10 December 2020, Ha Long Bay, Vietnam.

Li, Wenxun and Tang, Xiaohong and Yang, Yang and Tran, Xuan Tu and Bui, Duy Hieu (2019) A Dual Polarization SIW Slot Antenna Adopting TM340 And TM430 Modes in the X-band. In: 2019 IEEE Asia-Pacific Microwave Conference (APMC), 10-13 December 2019, Marina Bay Sands, Singapore. (In Press)

Nguyen, Ngo Doanh and Bui, Duy Hieu and Tran, Xuan Tu (2019) A Novel Hardware Architecture for Human Detection using HOG-SVM Co-Optimization. In: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 11-14 November 2019, Bangkok.

Tran, Xuan Tuyen and Nguyen, Duy Anh and Bui, Duy Hieu and Tran, Xuan Tu (2019) A Variable Precision Approach for Deep Neural Networks. In: International Conference on Advanced Technologies for Communications (ATC) 2019, 17-18 October 2019, Ha Noi.

Nguyen, Duy Anh and Bui, Duy Hieu and Iacopi, Francesca and Tran, Xuan Tu (2019) An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks. In: 2019 32nd IEEE International System-on-Chip Conference (SOCC), 3-6 September 2019, Singapore.

Nguyen, Duy Anh and Ho, Huy Hung and Bui, Duy Hieu and Tran, Xuan Tu (2018) An Efficient Hardware Implementation of Artificial Neural Network based on Stochastic Computing. In: 2018 The 5th NAFOSTED Conference on Information and Computer Science (NICS), 23-24 November 2018, Ho Chi Minh city, Vietnam.

Ho, Huy Hung and Nguyen, Ngoc Sinh and Bui, Duy Hieu and Tran, Xuan Tu (2017) Accurate and Low Complex Cell Histogram Generation by Bypass the Gradient of Pixel Computation. In: The 4th NAFOSTED Conference on Information and Computer Science (NICS), 24-25 November 2017, Hanoi, Vietnam.

Nguyen, Quang Linh and Tran, Dinh Lam and Bui, Duy Hieu and Mai, Duc Tho and Tran, Xuan Tu (2017) Efficient Binary Arithmetic Encoder for HEVCwith Multiple Bypass Bin Processing. In: The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), 5-6 October 2017, Hanoi, Vietnam.

Bui, Duy Hieu and Puschini, Diego and Bacles-Min, Simone and Beigne, Edith and Tran, Xuan Tu (2016) Ultra Low-Power and Low-Energy 32-bit Datapath AES Architecture for IoT Applications. In: The 2016 IEEE International Conference on Integrated Circuit Design and Technology, 27-29 June 2016, Ho Chi Minh city, Vietnam.

Nguyen, Ngoc-Mai and Beigne, Edith and Lesecq, Suzanne and Bui, Duy Hieu and Dang, Nam Khanh and Tran, Xuan Tu (2014) H.264/AVC Hardware Encoders and Low-Power Features. In: 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 17-20 November 2014, Okinawa, Japan.

Nguyen, Ngoc Sinh and Bui, Duy Hieu and Tran, Xuan Tu (2014) Reducing Temporal Redundancy in MJPEG using Zipfian Estimation Techniques. In: 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 17-20 November 2014, Okinawa, Japan.

Vu, Tien Luan and Quach, Van Quy and Bui, Duy Hieu and Tran, Xuan Tu (2014) A Low-Cost Implementation of Advance Encryption Standard. In: The 5th International Conference on Integrated Circuits, Design, and Verification (ICDV 2014), 14-15 November 2014, Hanoi, Vietnam.

Bui, Duy Hieu and Dang, Nam Khanh and Nguyen, Ngoc Mai and Nguyen, Kiem Hung and Tran, Xuan Tu (2014) Xây dựng hệ thống mô phỏng và kiểm chứng cho bộ mã hoá tín hiệu video H.264/AVC. In: REV-ECIT: National Conference on Electronics, Communications and Information Technology, 18-19 September 2014, Nha Trang, Vietnam.

Phan, Hai Phong and Nguyen, Kiem Hung and Bui, Duy Hieu and Dang, Nam Khanh and Tran, Xuan Tu (2013) System-on-Chip Testbed for Validating the Hardware Design of H.264/AVC Encoder. In: REV: the 2013 National Conference on Electronics and Communications, 17 December 2013, Hanoi.

Nguyen, Tung and Bui, Duy Hieu and Phan, Hai Phong and Dang, Trong Trinh and Tran, Xuan Tu (2013) High-Performance Adaption of ARM Processor into Network-on-Chip Architectures. In: The 26th IEEE International System-on-Chip Conference (SOCC), 4-6 September 2013, Erlangen, Germany.

Bui, Duy Hieu and Tran, Van Huan and Nguyen, Van Mien and Ngo, Duc Hoang and Tran, Xuan Tu (2012) A Hardware Architecture for Intra Prediction in H.264/AVC Encoder. In: 2012 IEICE International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), 13-15 August 2012, Danang, Vietnam.

Bui, Duy Hieu and Tran, Xuan Tu (2011) Multi-level Design Methodology using SystemC and VHDL for JPEG Encoder. In: The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 8-10 August 2011, Hanoi, Vietnam.

Patent

Tran, Xuan Tu. VNU University of Engineering and Technology (2019) Quy trình mã hóa liên khung hình hỗ trợ xác định khối ảnh lặp lại, giảm kích thước chuỗi bit sau mã hóa và loại bỏ hiệu ứng do sai số lượng tử cho khối ảnh lặp lại. 1-0021424 (1-2017-00868).

This list was generated on Sat Nov 27 07:13:52 2021 +07.