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Items where Author is "Tran, Xuan Tu"

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Article

Dang, Nam Khanh and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2021) HotCluster: A thermal-aware defect recovery method for Through-Silicon-Vias Towards Reliable 3-D ICs systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . ISSN 0278-0070 (In Press)

Nguyen, Kiem Hung and Tran, Xuan Tu (2020) An Implementation of PCA and ANN-based Face Recognition System on Coarse-grained Reconfigurable Computing Platform. VNU Journal of Computer Science and Communication Engineering, 36 (2). pp. 52-67. ISSN 0866-8612

Al-Shatari, Mohammed Omar Awadh and Hussin, Fawnizu Azmadi and Aziz, Azrina Abd and Witjaksono, Gunawan and Tran, Xuan Tu (2020) FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices. IEEE Access, 8 . pp. 207610-207618. ISSN 2169-3536

Dang, Nam Khanh and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2020) A thermal-aware on-line fault tolerance method for TSV lifetime reliability in 3D-NoC systems. IEEE Access, 8 . pp. 166642-166657. ISSN 2169-3536

Dang, Nam Khanh and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2020) Thermal distribution and reliability prediction for 3D Networks-on-Chip. VNU Journal of Computer Science and Communication Engineering, 36 (1). pp. 65-77. ISSN 0866-8612

Dang, Nam Khanh and Meyer, Michael and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2020) 2D Parity Product Code for TSV Online Fault Correction and Detection. REV Journal on Electronics and Communications, 10 (1-2). pp. 11-21.

Dang, Nam Khanh and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2020) TSV-OCT: A Scalable Online Multiple-TSV Defects Localization for Real-Time 3-D-IC Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 28 (3). pp. 672-685. ISSN 1063-8210

Tran, Xuan Tu and Nguyen, Ngoc Sinh and Bui, Duy Hieu and Nguyen, Kiem Hung and Pham, Minh Trien and Pham, Cong Kha (2020) Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Error in Stationary Blocks. EAI Transactions on Industrial Networks and Intelligent Systems . ISSN 2410-0218

Tran, Dinh Lam and Tran, Xuan Tu and Bui, Duy Hieu and Pham, Cong Kha (2020) An Efficient Hardware Implementation of Residual Data Binarization in HEVC CABAC Encoder. Electronics, 9 (4). p. 684. ISSN 2079-9292

Hoang, Trong Thuc and Duran, Ckristian and Nguyen, Khai Duy and Dang, Tuan Kiet and Nguyen, Quang Nhu Quynh and Than, Phuc Hong and Tran, Xuan Tu and Le, Duc Hung and Tsukamoto, Akira and Suzaki, Kuniyasu and Pham, Cong Kha (2020) Low-power High-performance 32-bit RISC-V Microcontroller on 65-nm Silicon-On-Thin-BOX (SOTB). IEICE Electronics Express, VV . ISSN 1349-2543

Dang, Nam Khanh and Meyer, Michael and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2020) A non-blocking non-degrading multiple defects link testing method for 3D-Networks-on-Chip. IEEE Access, 8 . pp. 59571-59589. ISSN 2169-3536

Tran, Dinh Lam and Pham, Viet Huong and Nguyen, Kiem Hung and Tran, Xuan Tu (2019) A Survey of High-Efficient CABAC Hardware Implementations in HEVC Standard. VNU Journal of Computer Science and Communication Engineering, 35 (2). pp. 1-21. ISSN 0866-8612

Nguyen, Kiem Hung and Tran, Xuan Tu (2019) A novel reconfigurable router for QoS guarantees in real-time NoC-based MPSoCs. Journal of Systems Architecture, 100 . pp. 101664-101677. ISSN 1383-7621

Dang, Nam Khanh and Tran, Xuan Tu (2019) An adaptive and high coding rate soft error correction method in Network-on-Chips. VNU Journal of Computer Science and Communication Engineering . ISSN 0866-8612

Tran, Xuan Tu and Nguyen, Tung and Phan, Hai Phong and Bui, Duy Hieu (2017) ​AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E100-A (8). pp. 1650-1660. ISSN 1745-1337

Bui, Duy Hieu and Puschini, Diego and Bacles-Min, Simone and Beigne, Edith and Tran, Xuan Tu (2017) AES datapath optimization strategies for low-power low-energy multi-security-level Internet-of-Thing applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25 (12). pp. 3281-3290. ISSN 1063-8210

Dang, Nam Khanh and Ahmed, Akram Ben and Tran, Xuan Tu and Okuyama, Yuichi and Abdallah, Abderazek Ben (2017) A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25 (11). pp. 3099-3112. ISSN 1063-8210

Nguyen, Kiem Hung and Le, Van Thanh Vu and Tran, Xuan Tu (2017) A Survey on Reconfigurable System-on-Chips. REV Journal on Electronics and Communications . ISSN 1859-387X

Nguyen, Kiem Hung and Tran, Xuan Tu (2016) An Efficient Implementation of Advanced Encryption Standard on the Coarse-grained Reconfigurable Architecture. VNU Journal of Computer Science and Communication Engineering, 32 (2). ISSN 0866-8612

Phan, Hai Phong and Tran, Xuan Tu (2015) Design and Modeling of a Voltage-Frequency Controller for Network-on-Chip Routers based on Fuzzy-Logic. VNU Journal of Computer Science and Communication Engineering, 31 (2). pp. 56-65. ISSN 0866-8612

Le, Van Thanh Vu and Tran, Xuan Tu (2014) High-Level Modeling and Simulation of a Novel Reconfigurable Network-on-Chip Router. REV Journal on Electronics and Communications . pp. 68-74. ISSN 1859-387X

Nguyen, Ngoc Mai and Bui, Duy Hieu and Dang, Nam Khanh and Beigne, Edith and Lesecq, Suzanne and Vivet, Pascal and Tran, Xuan Tu (2014) An Overview of H.264 Hardware Encoder Architectures including Low-Power Features. REV Journal on Electronics and Communications, 4 (1-2). pp. 34-43. ISSN 1859-378X

Tran, Van Huan and Tran, Xuan Tu (2011) CoMoSy: a Flexible System-on-Chip Platform for Embedded Applications. Journal of Research, Development, and Application on Information and Communication Theory, E-1 (4(8)). pp. 17-26. ISSN 1859-3534

Tran, Xuan Tu and Tran, Van Huan (2011) An Efficient Architecture of Forward Transforms and Quantization for H.264/AVC Codecs. REV Journal on Electronics and Communications , 1 (2). pp. 122-129. ISSN 1859-387X

Tran, Xuan Tu and Thonnart, Yvain and Durupt, Jean and Beroulle, Vincent and Robach, Chantal (2009) Design-for-Test Approach of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application. IET Computers & Digital Techniques, 3 (5). pp. 487-500. ISSN 1751-8601

Beigne, Edith and Fabien, Clermidy and Lhermet, Hélène and Miermont, Sylvain and Thonnart, Yvain and Tran, Xuan Tu and Valentian, Alexandre and Varreau, Didier and Vivet, Pascal and Popon, Xavier and Lebreton, Hugo (2009) An Asynchronous Power Aware and Adaptive NoC Based Circuit. IEEE Journal of Solid State Circuits (JSSC), 44 (4). pp. 1167-1177.

Book Section

Tran, Xuan Tu and Dang, Nam Khanh and Bui, Duy Hieu and Merigot, Alain (2021) Low Cost Inter-prediction Architecture in H.264/AVC Encoders with an Efficient Data Reuse Strategy. In: Advances in Engineering Research. Nova Science Publishers. ISBN 978-1-53618-929-2

Conference or Workshop Item

Nguyen, Ngo Doanh and Bui, Duy Hieu and Hussin, Fawnizu Azmadi and Tran, Xuan Tu (2022) An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection. In: 2022 International Conference on IC Design and Technology (ICICDT 2022), 21-23 September 2022, Hanoi, Vietnam. (In Press)

Tran, Duc Manh and Bui, Duy Hieu and Tran, Thi Thuy Quynh and Le, Van Thanh Vu and Tran, Xuan Tu (2020) Thiết kế bộ khuếch đại công suất cao tần hiệu suất cao trên công nghệ CMOS 65nm cho các ứng dụng IoT tốc độ cao. In: 23rd National Conference on Electronics, Communications and Information Technology (REV-ECIT), 19 December 2020, Hanoi, Vietnam.

Nguyen, Ngo Doanh and Bui, Duy Hieu and Tran, Xuan Tu (2020) A Lightweight AEAD encryption core to secure IoT applications. In: 2020 16th IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 8-10 December 2020, Ha Long Bay, Vietnam.

Dong, Pham Khoi and Nguyen, Kiem Hung and Hoang, Van Phuc and Tran, Xuan Tu (2020) Low-Power Implementation of a High-Throughput Multi-core AES Encryption Architecture. In: 2020 16th IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 8-10 December 2020, Ha Long Bay, Vietnam.

Nguyen, Duy Anh and Tran, Xuan Tu and Dang, Nam Khanh and Iacopi, Francesca (2020) A lightweight Max-Pooling method and architecture for Deep Spiking Convolutional Neural Networks. In: 2020 16th IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 8-10 December 2020, Ha Long Bay, Vietnam.

Dang, Nam Khanh and Ahmed, Akram Ben and Rokhani, Fakhrul Zaman and Abdallah, Abderazek Ben and Tran, Xuan Tu (2020) A thermal distribution, lifetime reliability prediction and spare TSV insertion platform for stacking 3D NoCs. In: 2020 International Conference On Advanced Technologies for Communications (ATC), 8-10 October 2020, Nha Trang.

Al-Shatari, Mohammed and Azmadi Hussin, Fawnizu and Abd Aziz, Azrina and Witjaksono, Gunawan and Saufy Rohmad, Mohd and Tran, Xuan Tu (2019) An Efficient Implementation of LED Block Cipher on FPGA. In: The First International Conference of Intelligent Computing and Engineering (ICOICE), 15-16 December 2019, Yemen.

Li, Wenxun and Tang, Xiaohong and Yang, Yang and Tran, Xuan Tu and Bui, Duy Hieu (2019) A Dual Polarization SIW Slot Antenna Adopting TM340 And TM430 Modes in the X-band. In: 2019 IEEE Asia-Pacific Microwave Conference (APMC), 10-13 December 2019, Marina Bay Sands, Singapore. (In Press)

Nguyen, Ngo Doanh and Bui, Duy Hieu and Tran, Xuan Tu (2019) A Novel Hardware Architecture for Human Detection using HOG-SVM Co-Optimization. In: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 11-14 November 2019, Bangkok.

Dang, Nam Khanh and Meyer, Michael and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2019) 2D-PPC: A single-correction multiple-detection method for Through-Silicon-Via Faults. In: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 11-14 November 2019, Bangkok.

Tran, Xuan Tuyen and Nguyen, Duy Anh and Bui, Duy Hieu and Tran, Xuan Tu (2019) A Variable Precision Approach for Deep Neural Networks. In: International Conference on Advanced Technologies for Communications (ATC) 2019, 17-18 October 2019, Ha Noi.

Dang, Nam Khanh and Ahmed, Akram Ben and Tran, Xuan Tu (2019) An on-communication multiple-TSV defects detection and localization for real-time 3D-ICs. In: 2019 IEEE 13th International Symposium on embedded Multicore/Manycore Systems-on-Chip (IEEE MCSoC-2019), 1-3 October 2019, Singapore. (In Press)

Dong, Pham Khoi and Nguyen, Kiem Hung and Tran, Xuan Tu (2019) A 45nm High-Throughput and Low Latency AES Encryption for Real-Time Applications. In: 2019 19th International Symposium on Communications and Information Technologies (ISCIT), 25-27 September 2019, Ho Chi Minh city.

Nguyen, Duy Anh and Bui, Duy Hieu and Iacopi, Francesca and Tran, Xuan Tu (2019) An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks. In: 2019 32nd IEEE International System-on-Chip Conference (SOCC), 3-6 September 2019, Singapore.

Nguyen, Duy P. and Tran, Xuan Tu and Nguyen, Nguyen L. K. and Nguyen, Tan Phat and Pham, Anh Vu (2019) High Gain High Efficiency Doherty Amplifiers with Optimized Driver Stages. In: 2019 62nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 4-7 August 2019, Dallas, Texas, USA.

Dang, Nam Khanh and Ahmed, Akram Ben and Abdallah, Abderazek Ben and Tran, Xuan Tu (2019) TSV-IaS: Analytic analysis and low-cost non-preemptive on-line detection and correction method for TSV defects. In: 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 15-17 July 2019, Florida, USA.

Nguyen, Duy P. and Tran, Xuan Tu and Nguyen, Nguyen L. K. and Nguyen, Tan Phat and Pham, Anh Vu (2019) A Wideband High Efficiency Ka-Band MMIC Power Amplifier for 5G Wireless Communications. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 26-29 May 2019, Sapporo, Japan.

Nguyen, Duy Anh and Ho, Huy Hung and Bui, Duy Hieu and Tran, Xuan Tu (2018) An Efficient Hardware Implementation of Artificial Neural Network based on Stochastic Computing. In: 2018 The 5th NAFOSTED Conference on Information and Computer Science (NICS), 23-24 November 2018, Ho Chi Minh city, Vietnam.

Nguyen, Kiem Hung and Dong, Pham Khoi and Tran, Xuan Tu (2018) A Reconfigurable Multi-function DMA Controller for High-Performance Computing Systems. In: 2018 The 5th NAFOSTED Conference on Information and Computer Science (NICS), 23-24 November 2018, Ho Chi Minh city, Vietnam. (In Press)

Dao, Manh Hiep and Hoang, Van Phuc and Dao, Van Lan and Tran, Xuan Tu (2018) An Energy Efficient AES Encryption Core for Hardware Security Implementation in IoT Systems. In: 2018 International Conference on Advanced Technologies for Communications (ATC), 18-20 October 2018, Ho Chi Minh city, Vietnam. (In Press)

Dang, Nam Khanh and Tran, Xuan Tu (2018) Parity-based ECC and Mechanism for Detecting and Correcting Soft Errors in On-Chip Communication. In: 2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 12-14 September 2018, Hanoi, Vietnam.

Nguyen, Kiem Hung and Tran, Xuan Tu (2018) A Novel Priority-Driven Arbiter for the Router in Reconfigurable Network-on-Chips. In: 2018 IEEE International Conference on IC Design & Technology (ICICDT), 4-6 June 2018, Otranto, Italy.

Ho, Huy Hung and Nguyen, Ngoc Sinh and Bui, Duy Hieu and Tran, Xuan Tu (2017) Accurate and Low Complex Cell Histogram Generation by Bypass the Gradient of Pixel Computation. In: The 4th NAFOSTED Conference on Information and Computer Science (NICS), 24-25 November 2017, Hanoi, Vietnam.

Dinh, Van Nam and Nguyen, Kiem Hung and Pham, Minh Trien and Tran, Xuan Tu (2017) An IDPSO Algorithm-based Application Mapping Method for Network-on-Chips. In: The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), 5-6 October 2017, Hanoi, Vietnam.

Nguyen, Quang Linh and Tran, Dinh Lam and Bui, Duy Hieu and Mai, Duc Tho and Tran, Xuan Tu (2017) Efficient Binary Arithmetic Encoder for HEVCwith Multiple Bypass Bin Processing. In: The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), 5-6 October 2017, Hanoi, Vietnam.

Phan, Hai Phong and Tran, Xuan Tu and Yoneda, Tomohiro (2017) Power Consumption Estimation using VNOC2.0 Simulator for a Fuzzy-Logic based Low Power Network-on-Chip. In: The 2017 IEEE International Conference on Integrated Circuit Design and Technology (IEEE ICICDT), 23-25 May 2017, Texas, USA.

Nguyen, Kiem Hung and Tran, Xuan Tu (2016) Design and Implementation of a Hybrid Switching Router for the Reconfigurable Network-on-Chip. In: the 2016 International Conference Advanced Technologies for Communications (ATC), 12-14 October 2016, Hanoi, Vietnam.

Phan, Hai Phong and Tran, Xuan Tu (2016) Fuzzy-Logic based Low Power Solution for Network-on-Chip Architectures. In: the 2016 International Conference Advanced Technologies for Communications (ATC), 12-14 October 2016, Hanoi, Vietnam. (In Press)

Nguyen, Thi Thuy and Le, Van Thanh Vu and Nguyen, Kiem Hung and Tran, Xuan Tu (2016) Routing-path Tracking and Updating Mechanism in Reconfigurable Network-on-Chips. In: The 2016 IEEE International Conference on Integrated Circuit Design and Technology, 27-29 June 2016, Ho Chi Minh city, Vietnam.

Bui, Duy Hieu and Puschini, Diego and Bacles-Min, Simone and Beigne, Edith and Tran, Xuan Tu (2016) Ultra Low-Power and Low-Energy 32-bit Datapath AES Architecture for IoT Applications. In: The 2016 IEEE International Conference on Integrated Circuit Design and Technology, 27-29 June 2016, Ho Chi Minh city, Vietnam.

Le, Van Thanh Vu and Tran, Xuan Tu (2016) Kiến trúc mới cho giải pháp tái cấu hình mạng trên chip. In: SW4PHD: the 2016 Scientific Workshop for PhD Students, 26 March 2016, Hanoi.

Phan, Hai Phong and Tran, Xuan Tu (2016) Thiết kế và mô hình hoá bộ xử lý lô-gic mờ trong điều khiển tần số - điện áp. In: SW4PHD: the 2016 Scientific Workshop for PhD Students, 26 March 2016, Hanoi.

Dang, Nam Khanh and Meyer, Michael and Okuyama, Yuichi and Abdallah, Abderazek Ben and Tran, Xuan Tu (2015) Soft-Error Resilient 3D Network-on-Chip Router. In: The IEEE 7th International Conference on Awareness Science and Technology (IEEE iCAST), 22-24 September 2015, Qinhuangdao, China.

Phan, Hai Phong and Tran, Xuan Tu (2015) A Fuzzy-Logic based Voltage-Frequency Controller for Network-on-Chip Routers. In: 2015: the 11th Conference on PhD Research in Microelectronics and Electronics (IEEE PRIME 2015), 29 June - 2 July 2015, Glasgow, Scotland.

Nguyen, Ngoc-Mai and Beigne, Edith and Lesecq, Suzanne and Bui, Duy Hieu and Dang, Nam Khanh and Tran, Xuan Tu (2014) H.264/AVC Hardware Encoders and Low-Power Features. In: 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 17-20 November 2014, Okinawa, Japan.

Nguyen, Ngoc Sinh and Bui, Duy Hieu and Tran, Xuan Tu (2014) Reducing Temporal Redundancy in MJPEG using Zipfian Estimation Techniques. In: 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 17-20 November 2014, Okinawa, Japan.

Nguyen, Kiem Hung and Tran, Quang Vinh and Tran, Xuan Tu (2014) Data Locality Exploitation for Coarse-grained Reconfigurable Architecture in Reconfigurable Network-on-Chips. In: The 5th International Conference on Integrated Circuits, Design, and Verification (ICDV 2014), 14-15 November 2014, Hanoi, Vietnam.

Vu, Tien Luan and Quach, Van Quy and Bui, Duy Hieu and Tran, Xuan Tu (2014) A Low-Cost Implementation of Advance Encryption Standard. In: The 5th International Conference on Integrated Circuits, Design, and Verification (ICDV 2014), 14-15 November 2014, Hanoi, Vietnam.

Nguyen, Ngoc Mai and Lombardi, Warody and Beigne, Edith and Lesecq, Suzanne and Tran, Xuan Tu (2014) FIFO-level-based Power Management and its Application to a H.264 encoder. In: 2014: The 40th Annual Conference of IEEE Industrial Electronics Society (IECON 2014), October 28 – November 1, 2014, Dallas, TX, USA.

Nguyen, Thi Thuy and Tran, Xuan Tu (2014) A Novel Asynchronous First-In-First-Out Adapting to Multi-synchronous Network-on-Chips. In: The 7th International Conference on Advanced Technologies for Communications (ATC 2014), 15-17 October 2014, Hanoi, Vietnam.

Phan, Hai Phong and Tran, Xuan Tu (2014) Thiết kế và mô hình hoá bộ xử lý lô-gic mờ trong điều khiển tần số - điện áp. In: 2014: National Conference on Electronics, Communications and Information Technology (REV-ECIT2014), 18-19 September 2014, Nha Trang, Vietnam.

Bui, Duy Hieu and Dang, Nam Khanh and Nguyen, Ngoc Mai and Nguyen, Kiem Hung and Tran, Xuan Tu (2014) Xây dựng hệ thống mô phỏng và kiểm chứng cho bộ mã hoá tín hiệu video H.264/AVC. In: REV-ECIT: National Conference on Electronics, Communications and Information Technology, 18-19 September 2014, Nha Trang, Vietnam.

Dang, Nam Khanh and Tran, Xuan Tu and Merigot, Alain (2014) An Efficient Hardware Architecture for Inter-Prediction in H. 264/AVC Encoders. In: The 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, April 23-25, 2014, Warsaw, Poland.

Le, Van Thanh Vu and Phan, Hai Phong and Tran, Xuan Tu (2014) High-Level Modeling of a Novel Reconfigurable Network-on-Chip Router. In: The first NAFOSTED Conference on Information and Computer Science (NICS 2014), March 13-14, 2014, Hanoi.

Phan, Hai Phong and Nguyen, Kiem Hung and Bui, Duy Hieu and Dang, Nam Khanh and Tran, Xuan Tu (2013) System-on-Chip Testbed for Validating the Hardware Design of H.264/AVC Encoder. In: REV: the 2013 National Conference on Electronics and Communications, 17 December 2013, Hanoi.

Nguyen, Tung and Bui, Duy Hieu and Phan, Hai Phong and Dang, Trong Trinh and Tran, Xuan Tu (2013) High-Performance Adaption of ARM Processor into Network-on-Chip Architectures. In: The 26th IEEE International System-on-Chip Conference (SOCC), 4-6 September 2013, Erlangen, Germany.

Hoang, Tran Van and Truong, Nguyen Ly Thien and Trang, Hoang and Tran, Xuan Tu (2013) Design and Implementation of a SoPC System for Speech Recognition. In: 2013 International Conference on Green and Human Information Technology (ICGHIT), February 27 - March 1, 2013, Hanoi, Vietnam.

Nguyen, Viet Thang and Tran, Xuan Tu and Le, Ha Vu (2013) An Efficient Algorithm of Inter-Prediction Coding for H.264/AVC Encoders. In: 2013 International Conference on Green and Human Information Technology (ICGHIT), February 27 - March 1, 2013, Hanoi, Vietnam.

Nguyen, Thi Thuy and Tran, Xuan Tu (2013) A Synchronous-to-Synchronous FIFO Architecture for Multi-synchronous Network-on-Chips. In: 2013 International Conference on Green and Human Information Technology (ICGHIT), February 27 - March 1, 2013, Hanoi, Vietnam.

Nguyen, Ngoc Mai and Tran, Xuan Tu and Vivet, Pascal and Lesecq, Suzanne (2012) An Efficient Context Adaptive Variable Length Coding Architecture for H.264/AVC Video Encoders. In: The 2012 International Conference on Advanced Technologies for Communications, 12-15 October 2012, Hanoi, Vietnam.

Le-Van, Thanh Vu and Tran, Xuan Tu and Ngo, Dien Tap (2012) Simulation and Performance Evaluation of a Network-on-Chip Architecture based on SystemC. In: The 2012 International Conference on Advanced Technologies for Communications, 12-15 October 2012, Hanoi, Vietnam.

Bui, Duy Hieu and Tran, Van Huan and Nguyen, Van Mien and Ngo, Duc Hoang and Tran, Xuan Tu (2012) A Hardware Architecture for Intra Prediction in H.264/AVC Encoder. In: 2012 IEICE International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), 13-15 August 2012, Danang, Vietnam.

Le, Van Thanh Vu and Ngo, Dien Tap and Tran, Xuan Tu (2012) A SystemC based Simulation Platform for Network-on-Chip Architectures. In: 2012 IEICE International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), 13-15 August 2012, Danang, Vietnam.

Dang, Nam Khanh and Le, Van Thanh Vu and Tran, Xuan Tu (2011) FPGA Implementation of a Low Latency and High Throughput Network-on-Chip Router Architecture. In: The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 8-10 August 2011, Hanoi, Vietnam.

Bui, Duy Hieu and Tran, Xuan Tu (2011) Multi-level Design Methodology using SystemC and VHDL for JPEG Encoder. In: The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 8-10 August 2011, Hanoi, Vietnam.

Tran, Xuan Tu (2011) Network-on-Chips: Design and Test Challenges in Nanoscale Era. In: The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 8-10 August 2011, Hanoi, Vietnam.

Tran, Xuan Tu and Tran, Van Huan (2011) Cost-Efficient 130nm TSMC Forward Transform and Quantization for H.264/AVC Encoders. In: The IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (IEEE DDECS), 13-15 April 2011, Cottbus, Germany.

Tran, Van Huan and Tran, Xuan Tu (2011) An Efficient Architecture Design for VGA Monitor Controller. In: The International Conference on Consumer Electronics, Communications and Networks (IEEE CECNet 2011), 16-18 April 2011, Hubei, China.

Nguyen, Ngoc Binh and Tran, Xuan Tu (2010) Needs and Challenges in Human Resource Development for Electronic Design in Vietnam. In: The 2010 IEICE International Conference on Integrated Circuits Design in Vietnam (ICDV), 16-18 June 2010, Ho Chi Minh city.

Tran, Van Huan and Nguyen, Ngoc Mai and Nguyen, Van Mien and Tran, Xuan Tu (2010) Low Cost and High Performance Implementation of Forward Transform and Quantization for an H.264/AVC Encoder. In: The 1st Solid-State Systems Symposium (4S), 1-June-2010, Ho Chi Minh city.

Tran, Xuan Tu and Phan, Hai Phong and Tran, Van Huan and Tran, Quang Vinh and Nguyen, Ngoc Binh (2010) Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA. In: The IEICE VLSI Design Technologies (VLD) Conference, 10-12 March 2010, Okinawa, Japan.

Thonnart, Yvain and Tran, Xuan Tu and Vivet, Pascal and Beigne, Edith and Clermidy, Fabien and Durupt, Jean (2009) An Asynchronous Low-Power Innovative Network-on-Chip including Design-for-Test capabilities. In: 2009 International Conference on Advanced Technologies for Communications, Haiphong, Vietnam.

Pham, Thi Hong and Pham, Phi Hung and Tran, Xuan Tu and Kim, Chulwoo (2008) Analysis and Evaluation of Traffic-Performance in a Backtracked Routing Network-on-Chip. In: The 2nd International Conference on Communications and Electronics (ICCE 2008), 4-6 June 2008, Hoian, Vietnam.

Tran, Xuan Tu and Thonnart, Yvain and Durupt, Jean and Beroulle, Vincent and Robach, Chantal (2008) A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application. In: Proceedings of the 2nd ACM/IEEE International Symposium on Networks-on-Chips (NOCS 2008).

Tran, Xuan Tu and Durupt, Jean and Bertrand, François and Beroulle, Vincent and Robach, Chantal (2007) How to Implement an Asynchronous Test Wrapper for Network-on-Chip Nodes. In: Informal Proceedings of the 12th IEEE European Test Symposium (ETS).

Tran, Xuan Tu and Beroulle, Vincent and Bertrand, François and Durupt, Jean and Robach, Chantal (2006) A DFT Architecture for Asynchronous Networks-on-Chip. In: The 11th IEEE European Test Symposium (ETS), 2006, Prague, Czech.

Tran, Xuan Tu and Beroulle, Vincent and Durupt, Jean and Robach, Chantal and Bertrand, François (2006) Design-for-Test of Asynchronous Networks-on-Chip. In: The 9th IEEE Symposium on Design and Diagnostics of Electronics Circuits and Systems (DDECS'06), 2006, Prague, Czech.

Book

Tran, Xuan Tu (2020) Mạng trên chip. Vietnam National University Publishing House. ISBN 978-604-9947-49-0

Tran, Xuan Tu and Phan, Xuan Hieu and Tran, Duc Tan and Pham, Manh Thang and Pham, Duc Thang and Pham, Bao Son (2017) Annual Scientific Report 2017 (ASR 2017). VNU-UET, Hanoi, Vietnam.

Tran, Xuan Tu and Le, Anh Cuong and Tran, Duc Tan and Pham, Manh Thang and Do, Thi Huong Giang (2016) The 2016 Annual Scientific Report of VNU University of Engineering and Technology. VNU University of Engineering and Technology.

Tran, Xuan Tu (2013) Emerging Aspects in Electronic and Communication Engineering. Vietnam National University Publisher, Hanoi, Vietnam. ISBN 978-604-62-0984-3

Patent

Tran, Xuan Tu. VNU University of Engineering and Technology (2019) Quy trình mã hóa liên khung hình hỗ trợ xác định khối ảnh lặp lại, giảm kích thước chuỗi bit sau mã hóa và loại bỏ hiệu ứng do sai số lượng tử cho khối ảnh lặp lại. 1-0021424 (1-2017-00868).

This list was generated on Thu Dec 1 09:34:17 2022 +07.